Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications

Embedded computing is shifting to multi/many-core designs to boost performance due to unacceptable power consumption and operating temperature increase of fast single-core CPU's. Hence, embedded system designers are increasingly faced with several big challenges, namely: the support for a variety of concurrent applications, and the platform heterogeneity. These challenges lead to the following significant design issues:
  • How can applications that exploit the underlying (parallel) architecture be written without burdening the application designer?
  • What does the application designer really need to know of the underlying architecture?
  • What tools are needed to efficiently map applications and what part of the mapping process should/could be automated?
  • How should we design and optimize the underlying architectures?
This workshop brings together researchers and practitioners actively working on architectures, design tools, and applications for embedded parallel computing platforms to address these questions and related issues.

March 22, 2013, Grenoble, France
Topic Areas

The workshop will have three main topic areas:
  • Architectures: on the most relevant problems arising during the design exploration and optimization of many/multi core architectures.
  • Design tools: on the state-of-the-art of tool development, showing where we are now and the directions we need to move in.
  • Applications: on the analysis, development, modification and integration of applications with respect to parallel computing platforms.

General Co-Chairs
João Cardoso Universidade do Porto Portugal
Cristina Silvano Politecnico di Milano Italy
Dimitrios Soudris National Technical University of Athens Greece

Architectures Posters Session Chair
Maurizio Palesi KORE University Italy

Design Tools Posters Session Chair
Chantal Ykman-Couvreur IMEC Belgium

Applications Posters Session Chair
Giovanni Agosta Politecnico di Milano Italy

Panel Session Chair
Georgi Gaydadjiev Chalmers University of Technology Sweden

Web Chair and Posters Submission Chair
Sotirios Xydis Politecnico di Milano Italy

Publicity Chair
Maurizio Palesi KORE University Italy

Posters Submission Instructions

Submission of posters are invited based on the instructions included in the Call for Posters and covering the topics of the three workshop sessions. In addition to the poster sessions, there will be a short presentation time for introducing the posters during the workshop. Poster submissions should either be a 150-200 word abstract or in the form of the poster itself (in an A4 or US Letter size format) and should clearly identify the relevant session (architectures, design tools, or applications). A workshop digest based upon the one-page abstract and one-page poster will be distributed to all participants of the workshop. Note that the posters presented at the DATE workshops are NOT disseminated through the official DATE proceedings or through any other formal channels, such as, for example, the IEEExplore or the ACM Digital Library.
Posters will be published online on this web page.
The submission web site will be posted on this Web Page by January 1st, 2013.
Click here for submitting your poster!

Posters submission deadline: January 15, 2013
POSTERS DEADLINE EXTENDED to Friday January 25, 2013

Posters notification of acceptance: February 5, 2013
EXTENDED to Tuesday February 12, 2013

Camera-Ready Material due date:
February 22, 2013
Call for Posters download

Start Time End Time Event
08:30 08:45 Opening Session by General Co-Chairs:João Cardoso, Universidade do Porto, Cristina Silvano, Politecnico di Milano, Dimitrios Soudris, National Technical University of Athens,
08:45 10:30 Session on: "Many-Core Architectures and Compilers"
08:45 09:30 Invited Speaker: Sri Parameswaran, University of New South Wales, Australia
  "Multiprocessor Systems for H.264/AVC video encoding: A platform approach"
09:45 10:30 Invited Speaker: Marcel Beemster, Associated Compiler Experts (ACE), Netherlands
  "C Compilation in the Dark Age of Many-Core Programming"
10:30 11:00 Architectures -- Posters Session - COFFEE BREAK (Posters program is now available)
11:00 12:00 Panel on: "Embedding High Performance Computing: A supercomputer in your pocket or ultra low power exaflop design"
Panel Organizer and Moderator:Georgi Gaydadjiev, Chalmers University of Technology

Todd Austin (The University of Michigan)
Patrick Blouet (ST Ericsson)
John Goodacre (ARM)
Andreas Moshovos (University of Toronto)
Alex Ramirez (Barcelona Supercomputing Center)
Eugenio Villar (University of Cantabria)

Bringing together experts from embedded computing and high-performance computing, this panel is organized to open the discussion about the common research challenges and synergies in these two areas, which have been recently magnified by the increasing ubiquity of many-cores and heterogeneity across the whole computing spectrum.
12:00 13:00 Lunch
13:00 15:00 Session on: "Design Tools and Applications for Many-Core Embedded Computing"
13:00 13:45 Invited Speaker: Dionisios Pnevmatikatos, Technical University of Crete, Greece
  "The role of runtime system management in dynamic execution enviroments"
14:00 15:00 Panel on: "Lessons Learnt from 2PARMA, ERA, FASTER, MADNESS, PARAPHRASE, REFLECT, SMECY and TERAFLUX European Projects"
Panel Organizer and Moderator:Georgi Gaydadjiev, Chalmers University of Technology

Panelists: William Fornaciari (Politecnico di Milano)
Philipp A. Hartmann (OFFIS)
Stephan Wong (TU Delft)
Dionisios Pnevmatikatos (Technical University of Crete)
Luigi Raffo (Universita di Cagliari)
Kevin Hammond (Univ. Of St. Andrews)
Zlatko Petrov (Honeywell)
Francois Pacull (CEA)
Roberto Giorgi (Universita di Siena)

This panel is organized to present and discuss final outcomes and lessons learnt from the following on-going EU funded projects: 2PARMA (PARallel PAradigms and Run-time MAnagement techniques for Many-core Architectures), COMPLEX (COdesign and power Management in PLatform-based design space Exploration), DeSyRe (DeSyRe: on-Demand System Reliability), ERA (Embedded Reconfigurable Architecture), FASTER (Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration), MADNESS (Methods for predictAble Design of heterogeneous Embedded Systems with adaptivity and reliability Support), PARAPHRASE (Parallel Patterns for Adaptive Heterogeneous Multicore Systems) REFLECT (Rendering FPGAs to Multi-Core Embedded Computing), SMECY (Smart Multicore Embedded Systems) and TERAFLUX (Exploiting Dataflow Parallelism in Teradevice Parallelism).
15:00 15:30 European Projects Parallel Demos Session - (Demos Program will be posted online) - COFFEE BREAK
15:30 16:15 Design Tools and Applications -- Posters Session (Posters now available online)
16:15 16:30 Final Wrap Up
Target audience

This workshop tries to bring together researchers and practitioners actively working on architectures, design tools, and applications for embedded computing systems. Based on the experience of the last editions of the event, we plan to enforce our publicity efforts to further increase last year's attendance (about 50 registered attendees from both industry and academia). The past edition of this Workshop was one of the most successful workshops in terms of attendance among the DATE 2012 Friday's Workshops (as well as in the previous two years). Links to the previous editions of this workshop can be found in Past Editions section.

Past editions